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@sunyanmeng963 sunyanmeng963 commented Jan 23, 2026

PR Type

Enhancement


Description

  • Add new BLUEBERRYF405 flight controller target

  • Configure timer hardware for 11 PWM outputs

  • Setup SPI devices for IMU, OSD, and SD card

  • Define UART, I2C, and ADC peripheral configurations


Diagram Walkthrough

flowchart LR
  A["BLUEBERRYF405 Target"] --> B["Timer Hardware"]
  A --> C["SPI Configuration"]
  A --> D["UART/I2C Setup"]
  A --> E["Sensor Support"]
  B --> F["11 PWM Outputs"]
  C --> G["IMU, OSD, SD Card"]
  D --> H["6 UARTs + SoftSerial"]
  E --> I["ICM42605, BMI270, BMP280"]
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File Walkthrough

Relevant files
Configuration changes
target.h
Complete hardware and peripheral definitions                         

src/main/target/BLUEBERRYF405/target.h

  • Defines board identifier and USB product string
  • Configures SPI1 for IMU (ICM42605/BMI270) and MAX7456 OSD
  • Configures SPI2 for SD card with blackbox logging
  • Sets up I2C1 for barometer, magnetometer, rangefinder, and pitot
  • Defines 6 UARTs plus softserial with CRSF receiver on UART2
  • Configures ADC channels for VBAT, current, RSSI, and airspeed
  • Enables LED strip, pinio box, and DShot ESC features
+165/-0 
target.c
Timer and PWM output hardware mapping                                       

src/main/target/BLUEBERRYF405/target.c

  • Defines timer hardware array with 11 PWM output channels
  • Maps timers to specific GPIO pins with DMA configurations
  • Allocates TIM8, TIM1, TIM2, TIM12, TIM13, TIM4 for servo outputs
  • Configures TIM3 for LED strip and TIM11 for beeper PWM
  • Includes commented-out PPM input configuration
+49/-0   
config.c
Target-specific runtime configuration                                       

src/main/target/BLUEBERRYF405/config.c

  • Sets up pinio box permanent IDs for user-defined functions
  • Enables PWM mode for beeper output
+29/-0   
CMakeLists.txt
Build system configuration                                                             

src/main/target/BLUEBERRYF405/CMakeLists.txt

  • Adds CMake build configuration for STM32F405 target
+1/-0     

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Branch Targeting Suggestion

You've targeted the master branch with this PR. Please consider if a version branch might be more appropriate:

  • maintenance-9.x - If your change is backward-compatible and won't create compatibility issues between INAV firmware and Configurator 9.x versions. This will allow your PR to be included in the next 9.x release.

  • maintenance-10.x - If your change introduces compatibility requirements between firmware and configurator that would break 9.x compatibility. This is for PRs which will be included in INAV 10.x

If master is the correct target for this change, no action is needed.


This is an automated suggestion to help route contributions to the appropriate branch.

@qodo-code-review
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PR Compliance Guide 🔍

All compliance sections have been disabled in the configurations.

DEF_TIM(TIM11, CH1, PB9, TIM_USE_BEEPER, 0, 0), // BEEPER PWM

// DEF_TIM(TIM9, CH2, PA3, TIM_USE_PPM, 0, 0), //RX2
DEF_TIM(TIM5, CH3, PA2, TIM_USE_ANY, 0, 0), //TX2 softserial1_Tx
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Suggestion: Comment out the conflicting timer definition for TIM5 on pin PA2 to resolve a resource conflict with UART2_TX_PIN. [possible issue, importance: 9]

Suggested change
DEF_TIM(TIM5, CH3, PA2, TIM_USE_ANY, 0, 0), //TX2 softserial1_Tx
// DEF_TIM(TIM5, CH3, PA2, TIM_USE_ANY, 0, 0), //TX2 softserial1_Tx

Comment on lines +42 to +47
#define ICM42605_CS_PIN PC14

#define USE_IMU_BMI270
#define IMU_BMI270_ALIGN CW270_DEG_FLIP
#define BMI270_SPI_BUS BUS_SPI1
#define BMI270_CS_PIN PC14
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Suggestion: Assign distinct chip select (CS) pins for the ICM42605 and BMI270 IMUs to prevent potential bus conflicts, as they currently share PC14. [possible issue, importance: 7]

Suggested change
#define ICM42605_CS_PIN PC14
#define USE_IMU_BMI270
#define IMU_BMI270_ALIGN CW270_DEG_FLIP
#define BMI270_SPI_BUS BUS_SPI1
#define BMI270_CS_PIN PC14
#define IMU_ICM42605_CS_PIN PC14
#define BMI270_CS_PIN PC15

Comment on lines +117 to +118
#define SOFTSERIAL_1_TX_PIN PA2
#define SOFTSERIAL_1_RX_PIN PA2
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Suggestion: Reassign SOFTSERIAL_1_RX_PIN from PA2 to another pin like PA3 to avoid conflicting with SOFTSERIAL_1_TX_PIN on the same pin. [possible issue, importance: 9]

Suggested change
#define SOFTSERIAL_1_TX_PIN PA2
#define SOFTSERIAL_1_RX_PIN PA2
#define SOFTSERIAL_1_TX_PIN PA2
#define SOFTSERIAL_1_RX_PIN PA3

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